BBC Micro Performance Wiki

index

14 min read

Wiki Index

Content catalog. Routing table for queries — start here, then drill into pages.

Sources

  • naug — The New Advanced User Guide (Holmes & Dickens, Adder, 458pp). Foundational reference. Ingested chapter-by-chapter.
  • naug-ch05-6502-isa — NAUG Ch5: 6502 instruction set (p35-106). Cycle counts, opcodes, 65C12 + R65C02 differences.
  • naug-ch12-memory — NAUG Ch12: Memory (p162-171). Map, paging, sideways RAM, shadow RAM, ACCCON, HAZEL.
  • naug-ch13-video — NAUG Ch13: Video/graphics (p172-224). 6845 CRTC, Video ULA, palette, hardware scrolling, fast animation, screen memory maps.
  • naug-ch22-vias — NAUG Ch22: System and User/Printer 6522 VIAs (p387-408). Ports, addressable latch, T1/T2 timers, shift register, IFR/IER.
  • naug-ch08-interrupts — NAUG Ch8: Interrupts (p131-142). IRQ chain, IRQ1V/IRQ2V, MOS dispatch order, BRK protocol, IRQ bit masks.
  • naug-ch03-04-arithmetic-addressing — NAUG Ch3+Ch4: 2’s complement, BCD, addressing modes (p22-34). JMP (ind) NMOS bug detail; 65C12 mode additions.
  • naug-appendix-ab — NAUG Appendix A + B: OSBYTE / OSWORD directory tables (p443-448). Index, not detail; detail backfilled per chapter.
  • naug-ch06-os-introduction — NAUG Ch6: OS introduction (p107-125). Vectored entry points, OSBYTE/OSWORD protocol, zero page + page 2 / 3 allocation, OSHWM.
  • naug-ch17-paged-roms — NAUG Ch17: Paged ROMs (p290-333). Header format, language vs service, service-call dispatch, extended vectors, OSRDRM, RFS, 100Hz polling.
  • naug-ch07-events — NAUG Ch7: Events (p126-130). EVNTV, 10 event codes, OSEVEN, handler conventions.
  • naug-ch09-buffers — NAUG Ch9: Buffers (p143-153). INSV/REMV/CNPV, 9 buffer IDs, OSBYTE wrappers, hooking patterns.
  • naug-ch21-sound — NAUG Ch21: Sound + speech (p379-386). OSWORD &07/&08, SN76489 chip-level details, slow-bus direct-write dance.
  • naug-ch11-hardware — NAUG Ch11: Hardware overview (p157-161). System block diagram, consolidated SHEILA table across all machines.
  • naug-ch14-keyboard — NAUG Ch14: Keyboard (p225-239). Three numbering schemes (ASCII / INKEY / IKN), scan, auto-repeat, soft keys, status byte.
  • naug-ch18-tube — NAUG Ch18: Tube / 2nd processor (p334-358). Tube ULA registers, OS dispatch over Tube, &406 entry, claim/release, data-transfer protocol.
  • naug-ch16-filing — NAUG Ch16: Filing systems (p257-289). Standard FS API, per-FS variations, DFS/ADFS catalogue formats, WD1770 FDC direct programming.
  • naug-ch23-1mhz-bus — NAUG Ch23: 1MHz bus + cartridges (p409-425). FRED/JIM, bus signals, clock-stretching gotchas + clean-up circuits, Master cart slot at 2 MHz, 27513 128 KB EPROMs.
  • naug-ch02-basic-assembler — NAUG Ch2: BBC BASIC inline assembler (p13-21). OPT bits, P%/O%, labels, EQU directives, two-pass dance, CALL/USR conventions.
  • naug-ch10-escape — NAUG Ch10: ESCAPE handling (p154-156). OSBYTE &7C/&7D/&7E, suppression flags &C8/&E5/&E6, character remap &DC.
  • naug-ch15-serial — NAUG Ch15: Serial I/O (p240-256). RS232/RS423 standards, 5-pin DIN pinout, 6850 ACIA, Serial ULA, baud-rate OSBYTEs.
  • naug-ch19-clocks-cmos — NAUG Ch19: Clocks/Timers/CMOS (p359-371). System clock + interval timer, Master 146818 RTC + 50-byte CMOS, alarm IRQ via LK4.
  • naug-ch20-adc — NAUG Ch20: ADC system (p372-378). µPD7002 chip, conversion timing, joystick reading, Master Compact’s switched-not-analogue simulator.
  • naug-ch24-misc — NAUG Ch24: Miscellaneous (p426-438). BREAK intercept &F7-&F9, reset types, printer UPTV, *CODE/*LINE via USERV, machine identification, NETV/KEYV.
  • allmem-ripley-harston — AllMem: BBC System Memory Map (Ripley/Harston, 2016). Byte-level catalogue of MOS workspace across BBC/Electron/Master variants. Authoritative cross-check for &00-&FF, &0200-&02FF, &0300-&03FF, buffer pages, &FE00-&FEFF, MOS jumpblock.
  • beebwiki-address-translation — BeebWiki: Address translation (mdfs.net). The discrete-logic translator: CPU/TTX/HI-RES modes, IC 32 + IC 39 wraparound mechanism, per-mode subtract amounts, MODE 7 formula.
  • beebwiki-crtc — BeebWiki: CRTC (mdfs.net). 6845 register map + Acorn quirks (R10 BLK encoding, MODE 7 R12/R13 XOR &54, 6845S variant).
  • beebwiki-video-ula — BeebWiki: Video ULA (mdfs.net). Shift-register / palette-CAM mechanics, undefined 80@1MHz / 10@2MHz behaviour, default palette write tables, hardware history (Ferranti / VLSI / VideoNuLA).
  • beebwiki-andy — BeebWiki: ANDY (mdfs.net). B+ 12 KB / Master 4 KB paged RAM area; OSWORD &05/&06 extended-addressing access; B+ shadow-display window at &A000-&AFFF.
  • beebwiki-cycle-stretching — BeebWiki: Cycle stretching (mdfs.net). Mechanism + complete list of 1 MHz peripheral addresses; variable 2c/3c penalty per access; phase-aligning notes.
  • hd6845sp-hitachi-datasheet — Hitachi HD6845R/HD6845S datasheet (primary chip-level reference). Register encodings, programming restrictions, anomalous-rewrite table, HD6845S-vs-HD6845R differences, reset behaviour.
  • saa5050-references — Combined SAA5050 references (Wikipedia, HandWiki, mdfs.net Teletext Controls, BeebFpga VHDL model). Substitutes for the image-only Mullard datasheet PDF (raw/manuals/SAA5050.pdf).
  • retrosoftware-smooth-vscroll — Talbot-Watkins, “How to do the smooth vertical scrolling” (retrosoftware.co.uk, 2008). Vertical rupture + R5 sub-row scroll technique. Includes BeebASM + BBC BASIC demos.
  • retrosoftware-fast-mult — Talbot-Watkins, “Fast multiplication routines” + “Fast fixed-point multiplication library” (retrosoftware.co.uk, 2008-09). Half-square LUT + base-127 signed fixed-point. Full BeebASM library.
  • chunky-mode-notes — Tom Seddon’s “mythical chunky mode” page + Julian Brown’s 2015 Stardot post on real-hardware behaviour. Combined notes on driving the CRTC from MODE 7 RAM while in graphics modes.
  • twisted-brain — kieran’s 15-part write-up of the Bitshifters Twisted Brain demo (Stardot, 2018). First BBC demo to use extensive single-rasterline CRTC vertical rupture. Foundation reference for modern Beeb demo techniques.
  • hexwab-stable-raster — hexwab’s “Cycle-exact display diddling” post (Retrosoftware, 2016). The canonical 2-cycle-precision stable-raster technique: narrowing-loop sync + T1 free-run + per-IRQ latch-read jitter compensation.
  • accc-compendium — Serge Querné’s Amstrad CPC CRTC Compendium (Logon System, v1.7 2023). 284-page chip-internal cycle-by-cycle reference for the 6845. CPC “CRTC 0” = BBC’s HD6845S/SP — canonical reference for chip-internal CRTC behaviour.
  • master-arm — Acorn Advanced Reference Manual for the BBC Master Series (~1986, 292 pages). Canonical reference for Master 128 / Compact / ET / Turbo. Ingested chapter-by-chapter.
  • master-rm — Acorn Master Series Reference Manual Parts 1 + 2 (~1986, 400+324 pages). User-and-programmer-level documentation: MOS, VDU driver (60 pages), filing systems, BASIC. Ingested chapter-by-chapter.
  • scarybeast-sn76489-sampled — Chris Evans (scarybeasts) 2020 blog post analysing SN76489 PCM playback physics: carrier-modulation via volume DAC, downstream analog chain (LM324N + LM386N-1).
  • smspower-sn76489 — SMSPower’s canonical SN76489 reference (Maxim et al., 2002-05). Bit-level LFSR / noise generator detail. The BBC’s noise tap mask $0003 documented here courtesy of John Kortink.
  • stardot-sn76489-sampled — scarybeasts’ 2025 Stardot threads: persistent-/WE 62.5 kHz writes + multi-channel software-mixed sample playback (Lotus, Chaos Engine, Robot Monsters at 12.5-15 kHz).
  • bbc-user-guide — Acorn BBC Microcomputer System User Guide (Coll, 1982, 522 pages). Original Model B end-user manual. Mostly BASIC tutorial (out of scope); canonical for VDU control codes / PLOT codes / error messages.
  • bbc-service-manual — Acorn BBC Microcomputer Service Manual (1982-85, 90 pages). Electrical-level circuit description + repair / link options for Model A/B PCB issues 1-7. Cross-checks for chip pages.
  • line-drawing-implementations — Comparative analysis of 5 Bresenham line implementations (Elite, RTW, NJ, Tricky, Raster). Per-pixel cycle tables, setup costs, named innovations. Source repo: kieranhj/line-test.
  • raster-source — raster.s from ebenupton/virus. Annotated MODE 2 line rasterizer with the canonical carry-chain + branch-outlining + chained-polygon implementation. 65C12-only.

Hardware

  • 6502 — CPU entity: registers, flags, machine variants (NMOS 6502 / 65C12 / R65C02), reset/interrupt vectors.
  • 6502-isa — Full instruction-set reference: per-mnemonic addressing modes, bytes, cycles, opcodes. Performance summary at end.
  • 6502-addressing-modes — Mode mechanics: 12 NMOS modes + 2 65C12 additions. Worked examples, page-crossing penalty, mode-cost summary, zp forward-reference trap.
  • crtc-6845 — 6845 CRTC entity: register map, per-mode values, screen-start lever, light pen, wrap-around.
  • crtc-6845-advanced — Anomalous-rewrite table (which registers tolerate mid-frame writes), R12/R13 sample phase, split-screen primitives, field timing.
  • video-ula — Acorn Video ULA: control register, palette mechanics, cursor width, logical-colour expansion rules per mode.
  • via-6522 — 6522 VIA generic: register map (ORA/ORB/DDR/T1/T2/SR/ACR/PCR/IFR/IER), IRA vs IRB asymmetry, IER set/clear protocol.
  • system-via — System VIA @ &FE40: slow peripheral bus, addressable latch, vsync/keyboard/light-pen/ADC IRQs, hardware-scroll wrap addend table.
  • user-via — User/Printer VIA @ &FE60: printer port pinout, user port pinout, PB7 audio, PB6 pulse counting.
  • sn76489 — TI SN76489 sound chip: 3 tones + 1 noise, frequency math, byte formats, direct slow-bus write sequence.
  • tube-ula — Tube ULA: 4 register pairs (status + data), R3 FIFO, IRQ/NMI sources, host vs parasite addressing.
  • 1mhz-bus — Expansion bus reference: FRED/JIM/SHEILA, pinout, clock-stretching, clean-up circuits, cartridge slot variant, performance use cases.
  • wd1770 — Floppy disc controller: register map, command types I-IV, status bits, NMI-per-byte protocol, direct sector read sequence.
  • 6850-acia — Motorola 6850 UART: status/control registers, clock divider, RTS/IRQ controls, word-format encodings.
  • serial-ula — Acorn serial ULA: baud-rate encoding, RS423/cassette switch, cassette motor control.
  • cmos-rtc — Master-only 146818 RTC: register layout, alarm/periodic/UE IRQ sources, slow-bus access, LK4 enable.
  • upd7002-adc — NEC µPD7002 4-channel 12-bit ADC: status/start register, 8-bit vs 12-bit modes, EOC IRQ on System VIA CB1.
  • address-translation — Discrete-logic CPU/CRTC → DRAM mapper. CPU/TTX/HI-RES modes, IC 32 + IC 39 hardware-scroll wraparound, MODE 7 formula, per-mode DRAM refresh intervals.
  • crtc-internal-counters — The C0/C4/C9/C5/VMA internal state model that underpins all 6845 behaviour. Last Line + Additional Management states. Per-register write-window summary. Foundation page for everything CRTC.
  • saa5050 — Mullard teletext character generator (MODE 7 pixel source). 12×20 cells, full control-code table, set-after vs set-at semantics, hold-graphics quirks, BBC integration.
  • master-overview — BBC Master 128 hardware orientation. 65C12 CPU, 128 KB DRAM, ACCCON, what changed vs B/B+, where things live.

Memory

  • memory-map — 64KB layout, SHEILA device addresses, user RAM sub-regions, machine-specific extras.
  • paged-rom — &FE30 paging register, sideways ROM/RAM, ANDY (Master), why you must never poke &FE30 directly.
  • shadow-ram — ACCCON &FE34 (B+ vs Master), shadow bank, HAZEL, double-buffered animation on Master.
  • zero-page — Page 0 allocation (BASIC/user/OS/VDU/FS), user zp at &70-&8F, strategies for claiming more, 65C12 (zp) advantage.
  • os-workspace — Pages 1, 2, 3, 8, 9, B, C, D: buffers, vectors, OS variables, VDU workspace, NMI, function keys. What to save/restore when bypassing MOS.

Video

  • modes — Mode summary: resolution, bpp, screen base, screen size, byte→pixel layout (MODE 2 interleaving), address arithmetic.
  • hardware-scrolling — R12/R13 lever, vertical & sideways scroll, hardware wrap-around, MODE 7 correction, vsync timing, OS shadow-copy issue.
  • plot-codes — VDU 25 PLOT k reference, k=0-95 (User Guide) + k=96-255 (Master extensions). Filled triangles/rectangles/circles/ellipses/flood fill.

Timing

  • via-timers — T1/T2 modes, periodic IRQ, raster splits, PB7 audio, pulse counting, MOS-sound conflict on System VIA T1.
  • cycle-stretching — Which addresses cost extra cycles (most of SHEILA, FRED, JIM); variable 2c/3c penalty; phase-aligning; what’s NOT stretched (Video ULA, Tube, FDC, ROMSEL).

OS / MOS

  • interrupts — IRQ dispatch chain, IRQ1V/IRQ2V hooks, mask OSBYTEs (&E7/&E8/&E9/&CB), 50Hz vs 100Hz, 2ms SEI ceiling, NMI overview.
  • brk — BRK protocol, Acorn error-message convention, BRKV install pattern, paged-ROM-raising-errors, NMOS CLD trap.
  • osbyte — Complete OSBYTE &00-&FF directory. Each entry links to source page once that chapter is ingested.
  • osword — Complete OSWORD directory: OS calls &00-&0F, filing-system &7A-&80, Tube &FF.
  • calls — Master OS entry-point reference: OSWRCH/OSRDCH/OSCLI/OSFILE/etc + indirection vectors + bypass strategies.
  • paged-roms — Paged ROM software contract: header, language vs service, calling into another ROM (OSRDRM / OSBYTE &8F / extended vectors), sideways-RAM install.
  • service-calls — Complete service-call reason-code reference (&00-&FF).
  • events — Event system: 10 event codes, EVNTV install pattern, event vs IRQ-vector trade-offs.
  • buffers — FIFO buffers: 9 IDs, INSV/REMV/CNPV vectors, OSBYTE wrappers, hook patterns, buffer→event connection.
  • sound — MOS SOUND/ENVELOPE OSWORDs, BELL OSBYTEs, suppression, MOS↔chip pipeline, when to bypass.
  • keyboard — Three numbering schemes (ASCII/INKEY/IKN), scan calls, auto-repeat, soft keys, status byte, direct matrix scan.
  • tube — Tube software protocol: detect (OSBYTE &EA), &406 entry (claim/release/transfer/execute), parasite OS dispatch table, OSWORD &05/&06, what changes when Tube active.
  • filing-systems — OSFILE/OSARGS/OSBGET/OSBPUT/OSGBPB/OSFIND reference, per-FS variation summary, Master HAZEL FS-handler, MOS-bypass strategies for fast disc I/O.
  • escape — ESCAPE handling: OSBYTE &7C-&7E, disable patterns for games, event 6 vs polling, side-effects of &7E.
  • serial — RS232/RS423 MOS calls: input/output stream selection, baud rates, RS423 mode, handshake threshold, bypass paths.
  • clocks — System clock + interval timer (5-byte / 100 Hz), OSWORD &01-&04, dual-clock atomicity (OSBYTE &F3), event 5 as one-shot.
  • adc — Joystick + ADC reading: OSBYTE &10/&11/&80/&BC/&BD/&BE, conversion modes, event 3, Compact simulator config.
  • break-intercept — BREAK / reset handling: OSBYTE &F7-&F9 JMP intercept, reset types (&FD), startup options (&FF), game-launcher patterns.
  • printer — Printer driver: *FX 5 destinations, UPTV (&222), ignore character, custom printer hooks.
  • vdu — Full VDU control code reference (VDU 0-31 + 127). Byte counts, semantics, VDU 23 sub-functions, VDU 18 GCOL modes.
  • vdu-internals — VDU driver internals: ~120 variables at &300-&37F + page-0 hot vars; the 8 &C000-&C015 primitive entry points (PLBYTE, HPLOT, GADDR, WIND, EIGABS, IEG); sideways-ROM intercept caveats.
  • star-commands — Full *command reference. Resident MOS commands, dispatch order, FS / sideways-ROM extension points, *CONFIGURE / *KEY / *HELP detail.
  • disc-formats — Sector-level layout for DFS (catalogue at sectors 0+1) and ADFS (Free Space Map at 0+1, root dir at 2-6, hierarchical sub-directories, 32-bit addresses).
  • errors — Error number ↔ message reference. BASIC errors 0-44, CFS 216-223, MOS 250+, filing-system errors. BRK-raising pattern.

Techniques

  • fast-animation — MODE 2 byte-move sprites, pre-shifted sprite tables, hardware-scroll as foundation, vsync sync.
  • custom-modes — Roll your own resolution/colour by reprogramming CRTC + Video ULA directly. Five-step recipe, MOS-bypass discipline, what breaks (OSWRCH, cursor, light pen), BREAK survival.
  • vertical-rupture — Multiple CRTC cycles per TV frame for split-screen / status panel. Worked MODE 2 example (16+23 rows). R12/R13 latching + R4/R6/R7 read-per-cycle as the mechanism.
  • smooth-vertical-scroll — 1-scanline vertical scrolling via R5 + two-cycle rupture. Screen-on timer for rock-steady top edge. Builds on vertical-rupture.
  • multiplication — Unsigned 8×8 → 16-bit: shift-and-add baseline (~113c) vs half-square LUT trick (~55c, 1 KB tables). Three implementations with tradeoff table.
  • fixed-point — Base-127 signed fixed-point representation. Why ×127 beats ×64/128/256. 4-way sign case-split, S8×S8 (~58c), S15×S8 (~170c), free sin/cos.
  • chunky-mode — 1 KB chunky display by routing CRTC fetches via MODE 7 RAM in a graphics mode. EOR-64 interleave for modes 0/1/2. Software workaround for Model B sync issue.
  • fx-framework — Demo runtime: SEI + System VIA T1 free-run for stable raster, FX module interface (init/update/draw/kill), the 312-line invariant. Foundation from Twisted Brain.
  • single-rasterline-rupture — Extreme vertical rupture: 64-256 CRTC cycles per frame, each 1-4 scanlines tall. Re-point R12/R13 or beam-race a tiny buffer. Foundation of most modern Beeb demo effects.
  • copper-bars — Pre-rendered MODE 0 ordered-dither buffer + per-row R12/R13 selection + hue-rotation palette. Covers both Copper Bars and Plasma effects (Twisted Brain Parts 6+7).
  • parallax-bars — 64-character-row pre-rendered MODE 1 buffer split main/SHADOW RAM, mid-frame ACCCON switch. The most timing-sensitive effect in Twisted Brain (Part 8).
  • vertical-blinds — Double-buffered 160-byte mini-frame, beam-race the buffer between FX draws. Linear line-buffer pattern + sink-loop constant-time discipline (Part 9).
  • kefrens-bars — True single-scanline beam-race accumulation of bars. R4-on-final-scanline real-hardware mystery + 311-line rebalance frame (Part 10).
  • checkerboard-zoom — Per-raster ULA flash-bit toggle for free colour inversion + unrolled MODE 1 partial-byte plot (Part 11).
  • twister — Narrow CRTC display via R1=20 + R2 centring + 128 prerendered ribbon rotations + alternate-scanline stipple for 4th colour (Part 13).
  • hexwab-stable-raster — 2-cycle-precision sync via narrowing-loop + T1 free-run + per-IRQ latch-read jitter compensation. The next-precision-level alternative to fx-framework’s ~8c jitter approach.
  • raster-splits — Overview / index of raster-split families. Routes readers from “I want to do a raster split” to the right specific technique page.
  • rvi — Per-line C9 selection via R0=1 micro-cycles + Last Line semantics. BBC’s “RVI” naming aliased to the CPC R.V.L.L. taxonomy. Full 32 KB CRTC-addressable RAM per visible line (64 KB on Master via shadow).
  • crtc-counter-freeze — R0=0 chip freeze. Experimental on BBC, no shipped use. Freezes C9 and most counters; sibling lever to triggered-vsync.
  • triggered-vsync — R7=C4 mid-line trigger (immediate VSync) vs C0vs<2 block (VSync silently inhibited). Per-field sub-scanline VSync edge nudging.
  • interlaced-640x512 — Master-only 640×512 two-colour interlaced mode. CRTC interlace-sync-and-video + per-vsync ACCCON D toggle between main and LYNNE half-frames. ARM Ch 6 recipe.
  • sampled-sound — PCM playback on the SN76489 via volume-DAC carrier modulation. 1980s single-channel ≤8 kHz vs scarybeasts (2025) persistent-/WE 62.5 kHz multi-channel mixed playback (Lotus / Chaos Engine quality).
  • bresenham-line — 5-way comparison of Bresenham implementations (Elite, RTW, NJ, Tricky, Raster). Steep/shallow cycle tables, setup costs, decision matrix.
  • cumulative-mask-batching — NJ’s threading of X across pixel-column entries to batch 8 EORs into one RMW. Drops shallow horizontal cost to ~8.75c/pixel.
  • carry-chain-invariant — Raster’s systematic C=1 maintenance. Eliminates per-iteration SEC; exploits DEY/BMI carry-neutrality on Y-up.
  • open-endpoint-chaining — Raster’s “draw start but not end” convention. Polygon vertices write exactly once; no XOR double-plot artifacts at shared corners.

Tools

  • basic-assembler — BBC BASIC inline assembler cheatsheet: OPT bits, P%/O%, labels, EQU directives, two-pass dance, FN-macro pattern, BeebAsm porting notes.

Synthesis

  • mode-8-16colour-lf — Community “MODE 8” (80×256, 16 colours, 10 KB) recipe. MODE 5 CRTC + Video ULA control = &E0. Derivation of bpp from R1 ÷ ULA-chars ratio.
  • model-differences — Cross-model comparison (B / B+ / Master 128 / Master Compact). Memory, CPU, FDC, video, IO. What’s portable, what’s not.

This wiki is curated by Claude following the LLM-Wiki methodology — a human curates source documents, the LLM compiles structured cross-linked markdown. Content may contain errors, omissions, or stale claims. For authoritative information refer to the original source documents in the bbc-documents GitHub archive.

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